Wafer level chip scale packaging (WLCSP) is one of the next generation of packaging solutions that has been developed to meet the demand of miniaturization for electronic devices. WLCSP may include a bumped wafer that can be singulated into individual die that can be directly mounted onto a printed circuit board without any further requirement to package. These individual bumped die may include integrated circuit systems that find application in many of today's consumer electronic devices, such as cell phones, video cameras, portable music players, computers, etc.
Unfortunately, these wafer level chip scale packages can present exposed die problems that arise during subsequent handling. For example, die cracking is becoming a pronounced problem as packaging technology shifts towards a thinner profile (i.e.—with targeted thicknesses of below fifty micrometers). These thinner profile packages lack the structural integrity necessary to withstand subsequent process steps, such as surface mounting and identification marking for device identification purposes.
Thus, a need still remains for a wafer level chip scale integrated circuit package system with enhanced structural integrity that permits non-destructive identification marking of the integrated circuit package system. In view of the ever increasing commercial competitive pressures, increasing consumer expectations, and diminishing opportunities for meaningful product differentiation in the marketplace, it is increasingly critical that answers be found to these problems. Moreover, the ever-increasing need to save costs, improve efficiencies, and meet such competitive pressures adds even greater urgency to the critical necessity that answers be found to these problems.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.